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Electrical Characteristics
2.6.4
DDR SDRAM AC Timing Specifications
This section describes the AC electrical characteristics for the DDR SDRAM interface.
2.6.4.1
DDR SDRAM Input Timings
Table 20 provides the input AC timing specifications for the DDR SDRAM when V DDDDR (typ) = 2.5 V.
Table 20. DDR SDRAM Input AC Timing Specifications for 2.5-V Interface
AC input low voltage
AC input high voltage
Parameter
Symbol
V IL
V IH
Min
—
MV REF + 0.31
Max
MV REF – 0.31
—
Unit
V
V
Note:
At recommended operating conditions with V DDDDR of 2.5 ± 5%.
Table 21 provides the input AC timing specifications for the DDR SDRAM when V DDDDR (typ) = 1.8 V.
Table 21. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
AC input low voltage
AC input high voltage
Parameter
Symbol
V IL
V IH
Min
—
MV REF + 0.25
Max
MV REF – 0.25
—
Unit
V
V
Note:
At recommended operating conditions with V DDDDR of 1.8 ± 5%.
Table 22 provides the input AC timing specifications for the DDR SDRAM interface.
Table 22. DDR SDRAM Input AC Timing Specifications
Controller Skew for
? 400 MHz
? 333 MHz
? 266 MHz
? 200 MHz
Parameter
MDQS—MDQ/MECC/MDM 1
Symbol
t CISKEW
Min
–365
–390
–428
–490
Max
365
390
428
490
Unit
ps
ps
ps
ps
Notes:
1.
2.
t CISKEW represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that is
captured with MDQS[n]. Subtract this value from the total timing budget.
At recommended operating conditions with V DDDDR (1.8 V or 2.5 V) ± 5%
MSC8144 Quad Core Digital Signal Processor Data Sheet, Rev. 16
Freescale Semiconductor
39
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